Residual Learning-Based Approximate Deficit Round Robin Scheduling for Fair and Reconfiguration-Aware Task Management in Multi Tenant FPGA Systems

Authors

  • Abirami B Author
  • V. Vasudevan Author

Keywords:

FPGA scheduling; partial reconfiguration; deficit round robin; residual learning; runtime prediction; starvation mitigation; multi-tenancy.

Abstract

Multi-tenant field-programmable gate arrays (FPGAs) share a few partially reconfigurable regions among tenants whose hardware tasks run non-preemptively, whose execution times are known only through inaccurate user estimates, and whose every change of resident bitstream costs a serialised reconfiguration. This paper presents RL-A-DRR, a residual-learning approximate deficit round robin scheduler. A 177-parameter neural predictor learns the log residual between the requested and the actual execution time from causal user-history features and is refined online. Its corrected costs, augmented with the expected reconfiguration delay, drive a deficit round robin over four length–priority classes whose admission is approximate: only a look-ahead window of ???? tasks per class is examined, so a decision is independent of queue length, and credit-eligible tasks whose bitstream is already resident are preferred and may borrow a bounded credit. Deficits are trued-up with the actual occupancy, which bounds the weighted service gap irrespective of prediction bias, while congestion adaptive aging and a starvation guard limit bypassing. RL-A-DRR is evaluated with an open C simulator driven by four production traces of the Parallel Workloads Archive (403,005 jobs) mapped onto a four-region FPGA with a 400 MB/s configuration port. Over 40 windows of 5,000 tasks at 80% load, RL-A-DRR reduces the mean waiting time by 70.8% relative to first-come first-served (FCFS) and by 46.5–64.6% relative to reconfiguration aware FCFS, classic deficit round robin and multilevel feedback queueing; it matches shortest-job-first on mean waiting time while lowering its 99th-percentile waiting time by 50–62%, and it cuts reconfigurations by 39% and the premium tier’s mean waiting time by 87.5% relative to FCFS. Under a tenfold under-estimation of low priority costs, error compensation keeps the premium-tier waiting time within 38% of its unbiased value, whereas uncompensated deficits inflate it 1.8–4.6 times. A scheduling decision takes 0.80 ????s on average.

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Published

2026-10-03

How to Cite

Residual Learning-Based Approximate Deficit Round Robin Scheduling for Fair and Reconfiguration-Aware Task Management in Multi Tenant FPGA Systems . (2026). Minimax Theory and Its Applications, 11(3s), 467-482. https://journalmta.com/index.php/jmta/article/view/510